Micron/Intel v. BeSang — Federal Circuit upheld PTAB decisions preserving BeSang’s patent claims

Case
Micron Technology, Inc., Micron Semiconductor Products, Inc., and Micron Technology Texas, LLC v. BeSang Inc.; Intel Corporation v. BeSang Inc.
Court
U.S. Court of Appeals for the Federal Circuit
Judge
Lourie; Reyna; Hughes
Date Decided
October 30, 2026
Docket No.
25-1320; 25-1377
Topics
Patent Law; Inter Partes Review; Obviousness; Prior-Art Enablement
Source
Read the full opinion

Background

BeSang Inc.’s U.S. Patent No. 7,378,702 concerns semiconductor memory structures using vertically oriented memory cells in a stackable add-on layer bonded to a separately fabricated substrate. Micron petitioned for inter partes review of claims 13–17, while Intel separately petitioned for review of claims 1 and 13–17.

The Patent Trial and Appeal Board concluded that neither petitioner carried its burden to prove the challenged claims unpatentable as obvious. In Micron’s proceeding, the Board rejected challenges based on Watanabe alone and Watanabe combined with the Lee Patent. In Intel’s proceeding, the Board rejected challenges to claim 13 involving the Lee Application and challenges to claim 1 based on Park and Kim. Micron and Intel appealed their respective final written decisions.

The Court’s Holding

The Federal Circuit affirmed both Board decisions. As to Micron, substantial evidence supported the finding that Watanabe was not enabled for the relied-upon disclosure because its 900–1000°C bonding process risked damaging or destroying underlying electronic components. Substantial evidence also supported the Board’s finding that Micron failed to establish a motivation to combine Watanabe with the Lee Patent, given the same temperature-related damage. The court therefore did not reach the Board’s separate reasoning concerning nonvolatile memory cells.

As to Intel’s claim 13 challenge, Intel did not appeal the Board’s finding that the Lee Application failed to teach a stackable add-on layer having vertically oriented semiconductor memory cells. The Board did not abuse its discretion by treating Intel’s separately presented arguments for another limitation as inapplicable to that limitation. For claim 1, substantial evidence supported the finding that Park’s adjoining memory cells shared electrodes and were not separated from each other by dielectric material as the claim required. The court rejected Intel’s contention that the Board had implicitly construed the claim to require electrical separation.

Key Takeaways

  • A standalone obviousness reference must enable the portions of its disclosure on which the petitioner relies when no other evidence supplies enablement.
  • The Board may interpret an IPR petition according to the arguments presented under each claim-limitation heading and need not reconstruct arguments presented elsewhere.
  • Unchallenged Board findings can independently defeat an obviousness theory on appeal.

Why It Matters

The nonprecedential decision underscores the importance of proving that relied-upon prior art can actually be practiced and of presenting each IPR theory clearly for every disputed limitation. It also shows that arguments omitted or waived on appeal may leave an independent Board finding intact and dispositive.

Because the Federal Circuit affirmed, BeSang’s challenged claims 1 and 13–17 were not shown unpatentable in these proceedings.

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